1. Field of the Invention
The present invention relates to a semiconductor substrate, a field-effect transistor, an integrated circuit, and a method for fabricating the semiconductor substrate.
2. Discussion of the Background
Group III-V compound semiconductor layers, due to their high carrier mobility, have been conventionally considered as promising replacements for silicon (Si) CMOS transistors. Specifically, MISFET with a group III-V compound semiconductor layer as a channel layer over a Si substrate has high carrier mobility and low carrier effective mass. As such, MISFET has been expected as a circuit element that could provide improvements over the characteristics to existing downsized Si CMOS transistors.
For example, see Ren, F. et al. “Demonstration of enhancement-mode p- and n-channel GaAs MOSFETs with Ga2O3(Gd2O3)As gate oxide.” Solid State Electron, 41, pp. 1751-1753 (1997); Ren, F. et al. “Ga2O3(Gd2O3)/InGaAs enhancement-mode n-channel MOSFET's.” IEEE Electron Device Lett., 19, pp. 309-311 (1998); Ye, P. D. et al. “GaAs MOSFET with oxide gate dielectric grown by atomic-layer-deposition.” IEEE Electron Device Lett., 24, pp. 209-211 (2003); Ye, P. D. et al. “GaAs metal-oxide-semiconductor field-effect transistor with nanometer-thin dielectric grown by atomic-layer-deposition.” Appl. Phys. Lett., 83, pp. 180-182 (2003); Non-patent document 5: Ye, P. D. et al. “Depletion-mode InGaAs metal-oxide-semiconductor field-effect transistor with oxide gate dielectric grown by atomic-layer deposition.” Appl. Phys. Lett., 84, pp. 434-436 (2004); Rajagopalan, K., Abrokwah, J., Droopad, R., and Passlack, M. “Enhancement-mode GaAs n-channel MOSFET.” IEEE Electron Device Lett., 27, pp. 959-962 (2006); Oktyabrsky, S. et al. “High-k gate stack on GaAs and InGaAs using in situ passivation with amorphous silicon.” Mater. Sci. Eng. B, 135, pp. 272-274 (2006); Xuan, Y., Wu, Y. Q., Lin, H. C., Shen, T., and Ye, P. D. “Submicrometer inversion n-type enhancement-mode InGaAs MOSFET with atomic-layer-deposited Al2O3 as gate dielectric.” IEEE Electron Device Lett., 28, pp. 935-938 (2007); Wu, Y. Q. et al. “Enhancement-mode InP n-channel metal-oxide-semiconductor field-effect transistors with atomic-layer-deposited Al2O3dielectrics.” Appl. Phys. Lett., 91, 022108 (2007); Zhu, F. et al. “Depletion-mode GaAs metal-oxide-semiconductor field-effect transistor with amorphous silicon interface passivation layer HfO2 gate oxide.” Appl. Phys. Lett., 91, 043507 (2007); Li, N. et al. “Properties of InAs metal-oxide-semiconductor structures with atomic-layer-deposited Al2O3 Dielectric.” Appl. Phys. Lett., 92, 143507 (2008); Lin, J. Q. et al. Inversion-mode self-aligned In0.53Ga0.47As n-channel metal-oxide-semiconductor field-effect transistor with HfAlO gate dielectric and TaN metal gate.” IEEE Electron Device Lett., 29, pp. 977-990 (2008); and Chin, H. C. et al. “Silane-ammonia surface passivation for gallium arsenide surface-channel n-MOSFETs.” IEEE Electron Device Lett., 30, pp. 110-112 (2009).